Chennai Institute of Technology (Autonomous) Wanted Senior Scientists / Junior Scientists

Research Position Recruitment 2024 job notification announced by Chennai Institute of Technology (Autonomous), Chennai, for the post of Senior Scientists, Junior Scientists & Junior Research Fellow. Eligible candidates may apply through Email.


Hiring Organization: Chennai Institute of Technology (Autonomous)

Organization Profile: Chennai Institute of technology, the best engineering college in Chennai was established with the objective of providing quality technical education with adequate industrial exposure than any other engineering colleges in Chennai, caters the needs of the youth with its innovative teaching methods.

Apart from interactive classroom scenario, periodic guest lectures by experts from industries and academic background provides thirst to the students to learn and to prepare for the ready-to-serve industrial requirements with uncompromised professional ethics.

CIT has been approved by the AICTE, New Delhi, affiliated to Anna University Chennai.

Research Centre: Centre for Hardware Design and Implementation

Research Position: Senior Scientists / Junior Scientists

Essential Qualifications: B.E/B.Tech in ECE / Biomedical Engineering and M.E/M.Tech in Electronics and Communication Engineering (VLSI /Signal Processing), Biomedical Engineering/ Medical Electronics. PhD in Engineering (VLSI) with Research Experience from any recognized University/Institute.

Senior Scientist: Minimum of 15 research articles in Journals SCI / SCIE or a combined Impact factor of 25 and above

Junior Scientists: Minimum of 5 research articles in Journals SCI / SCIE or a combined Impact factor of 10 and above

Research Position: Junior Research Fellow

Essential Qualifications: B.E/B.Tech in ECE / Biomedical Engineering and M.E/M.Tech in Electronics and Communication Engineering, Biomedical Engineering/ Medical Electronics with minimum of 65% marks or 7.5 CGPA from any recognized University/Institute. Preference will be given for the candidates with Gate Score. Minimum of 2 research articles in Journals (SCIE) or a combined Impact factor of 2 and above

Desirable Qualifications: With a strong background in VLSI

Basic Understanding:

  • Solid foundation in electronics and digital logic design principles.
  • Knowledge of semiconductor physics and semiconductor devices.

VLSI Design:

  • Proficiency in Hardware Description Languages (HDLs) such as Verilog and VHDL.
  • Experience with Electronic Design Automation (EDA) tools like Cadence Virtuoso, Synopsys Design Compiler, and Mentor Graphics.
  • Ability to design and simulate digital and analog circuits at the transistor level.
  • Understanding of RTL (Register Transfer Level) design and synthesis.


  • Familiarity with Application-Specific Integrated Circuit (ASIC) and Field-Programmable Gate Array (FPGA) design methodologies.
  • Experience with ASIC design flows including synthesis, place and route, and timing closure.
  • Proficiency in FPGA programming languages such as Verilog, VHDL, or SystemVerilog.

Physical Design:

  • Knowledge of physical design concepts including floorplanning, placement, routing, and timing closure.
  • Understanding of parasitic extraction, signal integrity, and power analysis.
  • Familiarity with Physical Verification (DRC, LVS) and Design for Manufacturability (DFM) considerations.

Analog/Mixed-Signal Design:

  • Experience with analog and mixed-signal circuit design.
  • Knowledge of transistor-level design techniques for amplifiers, filters, oscillators, etc.
  • Understanding of noise analysis, stability, and compensation techniques.

Salary: Salary is Negotiable for deserving candidates.

Job Location: Chennai, Tamil Nadu

Last date for the receipt of applications: 21st  March 2024.

Application Form:

Organization Website:

How to Apply: Candidates who are all interested in research may send their resume along with all necessary certificates scanned copies (in single pdf) to the below mentioned Email address within 21st  March 2024.

Address for Communication:

Centre for Hardware Design and Implementation,
Chennai Institute of Technology,
Sarathy Nagar, Kundrathur,
Chennai-600069, TamilNadu, India.

[email protected]

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