Date Posted: October 24, 2026
Institution Name: Indian Institute of Technology (IIT) Hyderabad — IC Design Lab
Indian Institute of Technology Hyderabad has announced the IIT Hyderabad Recruitment 2026 notification inviting applications for the position of Analog IC Designer (Full-time contract basis), within an R&D project at the Institute’s IC Design Lab. IIT Hyderabad is a premier Institute of National Importance offering advanced engineering education and research. 1 vacancy is open under this recruitment for candidates with a strong background in Analog and Mixed-Signal Integrated Circuit Design. Interested candidates can apply by email, with the last date to receive the CV being November 10, 2026. Full details on eligibility, responsibilities, salary, and the application procedure are provided below.
Institution Profile: Indian Institute of Technology Hyderabad (IITH) is a premier institute of science and technology established in 2008. IITH has been consistently ranked in the top 10 institutes in India for Engineering according to NIRF. IITH offers undergraduate programs in classical engineering disciplines, applied sciences, design, and interdisciplinary areas. The very foundation of IIT Hyderabad is based on research and innovation . IITH encourages and supports innovation and entrepreneurship at every stage. IITH enjoys a very special relationship with Japanese universities and industries that goes beyond academic and research collaborations.
Employment Type: Full-time, Contract Basis (R&D Project)
Post Name/Designation
Analog IC Designer (Full-time contract basis), IC Design Lab, R&D Project
Domain: Analog and Mixed-Signal Integrated Circuit Design
Total Vacancies
1 (One) position of Analog IC Designer.
Key Responsibilities
- Design and develop analog and mixed-signal integrated circuits at the transistor level.
- Perform schematic design, testbench development, and pre-layout simulations using Cadence Virtuoso, Spectre, and ADE.
- Design analog blocks such as Op-Amps, comparators, current mirrors, bias circuits, bandgap references, and LDOs.
- Conduct DC, AC, transient, noise, stability, PVT corner, and Monte Carlo simulations to verify circuit performance.
- Optimize circuits for power, performance, area (PPA), gain, bandwidth, noise, and stability.
- Collaborate with layout engineers on floorplanning, matching techniques, and layout reviews.
- Perform post-layout simulations with parasitic extraction and debug performance deviations.
- Work with foundry PDKs, device models, and process design rules to ensure design compliance.
- Collaborate with cross-functional teams to support design reviews, documentation, and silicon characterization and validation.
Required Educational Qualifications
Preferred Qualification: A mandatory PhD with B.Tech/M.Tech in Electrical Engineering, Electronics and Communication Engineering, or VLSI Design, with 3+ years of experience.
Age Limit
Not specified in the notification.
Candidate Profile
Candidates should have strong fundamentals in CMOS analog circuit design, transistor-level simulation, analog performance analysis, PVT and Monte Carlo analysis, and hands-on experience with industry-standard analog design EDA tools (Cadence Virtuoso, Spectre, ADE).
Required Experience
A PhD with B.Tech/M.Tech in Electrical Engineering, Electronics and Communication Engineering, or VLSI Design, along with 3+ years of relevant experience in analog/mixed-signal IC design.
Pay Scale/Pay Level
Salary: Rs. 50,000/- per month with HRA.
Application Fee
Not applicable. No application fee has been prescribed for this recruitment.
Selection Process
Interested candidates must submit their CV by email for initial screening. Shortlisted candidates will be contacted directly by the IC Design Lab for further evaluation, as per the project’s standard recruitment process. (As per notification — no formal multi-stage selection process has been detailed.)
Job Location
IIT Hyderabad, IC Design Lab, Telangana
Important Dates
| Event | Date |
|---|---|
| Last Date to Receive CV | 10th November 2026 |
| Joining Date | 20th November 2026 |
Contract Period: 1 year, extendable based on performance and project requirements.
Apply Mode
How to Apply
Kindly drop your latest resume at [email protected] on or before 10th November 2026.
Application Procedure
- Prepare an updated resume highlighting academic qualifications (PhD, B.Tech/M.Tech), relevant experience in analog/mixed-signal IC design, and proficiency in EDA tools such as Cadence Virtuoso, Spectre, and ADE.
- Email the resume to [email protected].
- Ensure the application reaches on or before the deadline of November 10, 2026.
- Shortlisted candidates will be contacted for further process, with an expected joining date of November 20, 2026.
Documents Required
Candidates should keep the following documents ready (Kindly Read the Notification)
- Updated detailed resume/CV
- Copies of educational qualification certificates (PhD, B.Tech/M.Tech)
- Proof of relevant experience in analog/mixed-signal IC design (3+ years)
- Portfolio or details of prior design projects/publications, if available
Important Links
| Link
Official Notification |
URL |
|---|---|
| Institute Website | https://www.iith.ac.in |
| Contact Email | [email protected] |
Disclaimer for Candidates: Candidates are advised to verify all details directly with IIT Hyderabad before applying. The position is purely contractual, for an initial period of 1 year, extendable based on performance and project requirements. The Institute reserves the right to modify, withdraw, or cancel the recruitment process at any stage without assigning any reason. Mere submission of a CV does not confer any right to selection or interview.
Institute Address:
IIT Hyderabad, IC Design Lab, Telangana
Contact: [email protected]
Benefits of Joining IIT Hyderabad
Joining IIT Hyderabad as an Analog IC Designer offers candidates the opportunity to work on advanced analog and mixed-signal integrated circuit design at the transistor level, within a dedicated IC Design Lab at a premier Institute of National Importance. The position offers a monthly salary of Rs. 50,000/- with HRA, along with hands-on exposure to industry-standard EDA tools (Cadence Virtuoso, Spectre, ADE), foundry PDKs, and the full design cycle — from schematic design and simulation to post-layout verification and silicon characterization. This role is well suited to PhD holders and experienced VLSI/analog design professionals looking to apply their expertise in a research-driven environment, with scope for contract extension based on performance.
Frequently Asked Questions (FAQs) — IIT Hyderabad Recruitment 2026
Q1. What is the IIT Hyderabad Recruitment 2026 notification about?
A. It is a recruitment notification for the position of Analog IC Designer on a full-time contract basis, within an R&D project at IIT Hyderabad’s IC Design Lab.
Q2. What is the last date to apply for IIT Hyderabad Recruitment 2026?
A. The last date to receive the CV is 10th November 2026.
Q3. How many vacancies are available under this recruitment?
A. There is 1 (one) vacancy for the post of Analog IC Designer.
Q4. What is the preferred qualification for this post?
A. A mandatory PhD with B.Tech/M.Tech in Electrical Engineering, Electronics and Communication Engineering, or VLSI Design, along with 3+ years of experience.
Q5. What is the salary offered for this position?
A. The position carries a salary of Rs. 50,000/- per month with HRA.
Q6. How can candidates apply for IIT Hyderabad Recruitment 2026?
A. Candidates should email their latest resume to [email protected] on or before November 10, 2026.
Q7. What is the contract period for this position?
A. The contract period is 1 year, extendable based on performance and project requirements.
Q8. Is there an application fee for this recruitment?
A. No, no application fee has been prescribed for this recruitment.
Q9. What skills are required for this position?
A. Strong fundamentals in CMOS analog circuit design, transistor-level simulation, PVT and Monte Carlo analysis, and hands-on experience with EDA tools like Cadence Virtuoso, Spectre, and ADE.
Q10. What is the expected joining date?
A. The expected joining date is 20th November 2026.
The IIT Hyderabad Recruitment 2026 for Analog IC Designer offers a strong opportunity for experienced VLSI and analog design professionals to contribute to cutting-edge integrated circuit R&D at a premier Institute of National Importance. With a clear focus on analog and mixed-signal design expertise, competitive compensation, and access to industry-standard design tools, this role suits PhD holders and seasoned engineers looking to deepen their research and design impact. Interested candidates are encouraged to prepare a strong resume highlighting their design experience and submit it well before the November 10, 2026 deadline.
